Field of the Invention
The present invention relates to a seal ring which is a protective structure for a semiconductor device.
Description of the Background Art
A protective structure called a seal ring, a die edge seal or a guard ring is provided on an inside of a dicing line, i.e., in the vicinity of an edge of a chip (die) in order to protect a circuit formation region of a semiconductor device from influence due to moisture and ions in outer atmosphere. The seal ring is formed of an interconnecting layer and a contact which are the same as those in the circuit formation region and is formed so as to surround the circuit formation region of the semiconductor device.
The circuit formation region of the semiconductor device can be protected from the influence due to moisture and ions in outer atmosphere by the existence of the seal ring, so that characteristics of this semiconductor device can be stabilized for a long period of time.
In addition, the seal ring has the function of suppressing the occurrence of cracking in the circuit formation region at the time of dicing in a dicing region. At the time of dicing, cracking may occur in the dicing region in some cases; however, such cracking can be prevented from reaching the circuit formation region by the existence of the seal ring between the dicing region and the circuit formation region.
Japanese Patent Application Laid-Open No. 2002-208676 discloses the following technique. A seal ring is formed and a plurality of dummy patterns are provided in a circuit formation region. Then, the flatness in a chip edge can be improved in a flattening process in accordance with a CMP (Chemical Mechanical Polishing) method.
In recent years, reduction in resistance of a interconnecting has become more important as miniaturization and increase in integration of a structure of a semiconductor device and increase in speed of an operation have advanced. Accompanying this, Cu (copper) having a comparatively small resistance has become widely used as an interconnecting material. More specifically, the number of cases where copper is utilized in the above-mentioned seal ring structure is increasing. In addition, a so-called low-k film (k<3.0) having a low specific dielectric constant k has become widely used as an interlayer insulating film.
In the case where such a low-k film is used as an interlayer insulating film, a problem arises where cracking that occurs at the time of dicing easily exceeds the seal ring and reaches the circuit formation region, so that the circuit formation region is negatively affected. In addition, in the case where cracking does not reach the circuit formation region but reaches the seal ring, a problem arises where resistance to absorbed moisture of the semiconductor device deteriorates.